Research output per year
Research output per year
B.E.(ECE),M.E.(DE), Ph.D.(Analog VLSI Signal Processing)
MIT Campus, Manipal, Karnataka State. Pin 576104
India
Research activity per year
+30 years
Analog VLSI Signal Processing; CMOS Mixed Signal Design;
Digital and Analog VLSI Deign;
Fractional-order Analog Signal Processing;
Fractional-order Analog Circuits; Bio-medical Signal Processing
Research output: Contribution to journal › Article › peer-review
Research output: Contribution to journal › Article › peer-review
Research output: Contribution to journal › Article › peer-review
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
Research output: Contribution to journal › Article › peer-review