TY - GEN
T1 - A Bipolar Multilevel Structure for DC/AC Conversion with Reduced Device Count
AU - Dewangan, Niraj Kumar
AU - Kumar, Dhananjay
AU - Nema, Rajesh Kumar
AU - Gupta, Krishna Kumar
N1 - Publisher Copyright:
© 2021 IEEE.
PY - 2021
Y1 - 2021
N2 - The present demand of multilevel inverter (MLI) has been increased rapidly from previous few decades, due to its reduced low harmonic components and decrease in stress across power semiconductor switches. Various topology of inverter has been proposed. This paper presents a bipolar single phase symmetrical MLI that has been incorporated to reduce device count and capable of generating five level output voltage waveform. To control the newly introduced multilevel structure a sinusoidal pulse width modulation (SPWM) scheme is used. In order to produce five level output, sources are connected in additive manner. The presented structure results in reduction of losses, number of component count, size and cost of inverter. A comparison study of the presented structure with basic conventional and some recently developed structures shows that the presented structure requires fewer numbers of device count and isolated driver circuits. The proposed design can be evaluated under different loading conditions (R-Load and RL-Load) using MATLAB/Simulink platform. The theoretical analysis and results of simulation study confirm the proper operation of the proposed inverter with experimental validation.
AB - The present demand of multilevel inverter (MLI) has been increased rapidly from previous few decades, due to its reduced low harmonic components and decrease in stress across power semiconductor switches. Various topology of inverter has been proposed. This paper presents a bipolar single phase symmetrical MLI that has been incorporated to reduce device count and capable of generating five level output voltage waveform. To control the newly introduced multilevel structure a sinusoidal pulse width modulation (SPWM) scheme is used. In order to produce five level output, sources are connected in additive manner. The presented structure results in reduction of losses, number of component count, size and cost of inverter. A comparison study of the presented structure with basic conventional and some recently developed structures shows that the presented structure requires fewer numbers of device count and isolated driver circuits. The proposed design can be evaluated under different loading conditions (R-Load and RL-Load) using MATLAB/Simulink platform. The theoretical analysis and results of simulation study confirm the proper operation of the proposed inverter with experimental validation.
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U2 - 10.1109/ICEPES52894.2021.9699788
DO - 10.1109/ICEPES52894.2021.9699788
M3 - Conference contribution
AN - SCOPUS:85126663743
T3 - 2021 IEEE 2nd International Conference on Electrical Power and Energy Systems, ICEPES 2021
BT - 2021 IEEE 2nd International Conference on Electrical Power and Energy Systems, ICEPES 2021
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2nd IEEE International Conference on Electrical Power and Energy Systems, ICEPES 2021
Y2 - 10 December 2021 through 11 December 2021
ER -