A Novel ASIC Implementation of Two-Dimensional Image Compression Using Improved B.G. Lee Algorithm

Tanya Mendez, Vishnumurthy Kedlaya K, Dayananda Nayak, H. S. Mruthyunjaya, Subramanya G. Nayak

Research output: Contribution to journalArticlepeer-review


A 2D Discrete Cosine Transform and Inverse Discrete Cosine Transform using the B.G. Lee algorithm, incorporating a signed error-tolerant adder for additions, and a signed low-power fixed-point multiplier to perform multiplications are proposed and designed in this research. A novel Application Specific Integrated Circuit hardware implementation is used for the 2D DCT/IDCT computation of each 8 × 8 image block by optimizing the input data using the concepts of pipelining. An enhanced speed in processing and optimized arithmetic computations was observed due to the eight-stage pipeline architecture. The 2D DCT/IDCT of each 8 × 8 image segment can be quickly processed in 34 clock cycles with a substantially reduced level of circuit complexity. The B.G. Lee algorithm has been implemented using signed error-tolerant adders, signed fixed-point multipliers, and shifters, reducing computational complexity, power, and area. The Cadence Genus tool synthesized the proposed architecture with gpdk-90 nm and gpdk-45 nm technology libraries. The proposed method showed a significant reduction of 31.01%, 12.17%, and 21.11% in power, area, and PDP in comparison to the existing image compression architectures. An improved PSNR of the reconstructed image was also achieved compared to existing designs.

Original languageEnglish
Article number9094
JournalApplied Sciences (Switzerland)
Issue number16
Publication statusPublished - 08-2023

All Science Journal Classification (ASJC) codes

  • General Materials Science
  • Instrumentation
  • General Engineering
  • Process Chemistry and Technology
  • Computer Science Applications
  • Fluid Flow and Transfer Processes


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