Adaptive fault tolerant architecture for enhanced reliability of small satellites

This paper demonstrates an improved methodology that can be adopted to build fault tolerant small satellites. In the proposed architecture the onboard computing is split between a dual controller system which involves two controllers placed on separate PCB's. A communication bus exists between these PCB's which helps in periodically monitoring the health status of the other board. Two antennae are considered for a dual frequency communication, each connected to a separate board. One antenna is multiplexed to downlink beacon telemetry and uplink tele-commands while the other is responsible for downlinking payload data. In case of failure of a board or controller or an RF component, the on-board computer switches suitably between the two communication links present. The parallel placement of certain IC's is another failsafe that is added, should any one individual IC fail. Both the microcontrollers sport a real time operating system which apart from increasing efficiency also enables quicker response to unexpected events. The controllers adapt to unexpected faults by over-utilizing other existing fault-free components. The integrated nanosatellite with this architecture was subject to various test cases with each test case representing a failure of a certain part or component. Overall performance was monitored and ability to maintain maximum performance was recorded. The reliability analysis was also made for the whole system.