Ambipolarity suppression in electrically doped tunnel field effect transistor using asymmetric bias in polarity gates

In this article, we have addressed an important issue called ambipolarity in electrically doped tunnel field effect transistors, which greatly hinders its use in circuit applications. We introduced asymmetric biasing in polarity gates 1 and 2 of the electrically doped TFET. Polarity gate 2 has a fixed bias of -1.2 V and polarity gate 1 is provided with a variable bias of +1.2 V, +1.0 V, and +0 .8V. The asymmetric bias in both polarity gates introduces asymmetric doping in the source and drain regions, which introduces a wider tunneling width in the drain-channel region and prevents the tunneling of holes; hence, the ambipolar current is suppressed. The structure is studied in the thermal equilibrium, OFF, ON, and ambipolar states.