TY - GEN
T1 - An asynchronous analog to digital converter for surveillance camera applications
AU - Siddharth, R. K.
AU - Sunil, R.
AU - Nithin Kumar, Y. B.
AU - Vasantha, M. H.
AU - Bonizzoni, Edoardo
N1 - Publisher Copyright:
© 2018 IEEE.
PY - 2018/8/7
Y1 - 2018/8/7
N2 - This paper proposes an asynchronous analog to digital converter (ADC) for surveillance camera applications. The proposed architecture is based on non-uniform sampling, whose sampling instants depend on the amplitude of the input voltage. The proposed design has the power performance advantage for an input voltage close to the upper reference voltage. Thus, the proposed architecture is suitable for the applications in which the input signal rarely assumes voltage values closer to the lower reference voltage. The design is simulated, at the transistor level, in a 180-nm CMOS technology. The results show that about 96.7% of the power can be saved in the best case (input voltage in the vicinity of upper reference voltage) when compared to a conventional flash ADC.
AB - This paper proposes an asynchronous analog to digital converter (ADC) for surveillance camera applications. The proposed architecture is based on non-uniform sampling, whose sampling instants depend on the amplitude of the input voltage. The proposed design has the power performance advantage for an input voltage close to the upper reference voltage. Thus, the proposed architecture is suitable for the applications in which the input signal rarely assumes voltage values closer to the lower reference voltage. The design is simulated, at the transistor level, in a 180-nm CMOS technology. The results show that about 96.7% of the power can be saved in the best case (input voltage in the vicinity of upper reference voltage) when compared to a conventional flash ADC.
UR - https://www.scopus.com/pages/publications/85052139566
UR - https://www.scopus.com/pages/publications/85052139566#tab=citedBy
U2 - 10.1109/ISVLSI.2018.00039
DO - 10.1109/ISVLSI.2018.00039
M3 - Conference contribution
AN - SCOPUS:85052139566
SN - 9781538670996
T3 - Proceedings of IEEE Computer Society Annual Symposium on VLSI, ISVLSI
SP - 164
EP - 169
BT - Proceedings - 2018 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2018
PB - IEEE Computer Society
T2 - 17th IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2018
Y2 - 9 July 2018 through 11 July 2018
ER -