TY - GEN
T1 - An improved genetic clustering architecture for real-time satellite image segmentation
AU - Ratnakumar, Rahul
AU - Nanda, Satyasai Jagannath
N1 - Publisher Copyright:
© 2021 IEEE.
PY - 2021
Y1 - 2021
N2 - In the last decade, researchers have focused on the development of hardware architectures for several real-life applications including image segmentation. Accurate analysis of segmented high-resolution satellite image help in identifying flood, fire, cloud, snow, and other natural phenomenon. In this paper, an improved genetic clustering architecture is proposed by introducing innovative architectures for crossover and mutation modules. In this architecture, complexity is low due to the use of Manhattan distance instead of traditional Euclidean distance. Testing of the proposed architecture has been carried out on two satellite captured flood images of Myanmar, Burma 2015, and Chennai, India 2015. Both the satellite images have been successfully segmented and obtained satisfactory PSNR and SSIM values, with an improved power consumption of 31 mW and 191 MHz clock frequency. In comparison with state-of-art architectures, the proposed work delivers satisfactory results in terms of power reduction, clock period, design complexity and resource utilization.
AB - In the last decade, researchers have focused on the development of hardware architectures for several real-life applications including image segmentation. Accurate analysis of segmented high-resolution satellite image help in identifying flood, fire, cloud, snow, and other natural phenomenon. In this paper, an improved genetic clustering architecture is proposed by introducing innovative architectures for crossover and mutation modules. In this architecture, complexity is low due to the use of Manhattan distance instead of traditional Euclidean distance. Testing of the proposed architecture has been carried out on two satellite captured flood images of Myanmar, Burma 2015, and Chennai, India 2015. Both the satellite images have been successfully segmented and obtained satisfactory PSNR and SSIM values, with an improved power consumption of 31 mW and 191 MHz clock frequency. In comparison with state-of-art architectures, the proposed work delivers satisfactory results in terms of power reduction, clock period, design complexity and resource utilization.
UR - https://www.scopus.com/pages/publications/85128388982
UR - https://www.scopus.com/pages/publications/85128388982#tab=citedBy
U2 - 10.1109/ICATME50232.2021.9732768
DO - 10.1109/ICATME50232.2021.9732768
M3 - Conference contribution
AN - SCOPUS:85128388982
T3 - Proceedings of International Conference on Advances in Technology, Management and Education, ICATME 2021
SP - 123
EP - 128
BT - Proceedings of International Conference on Advances in Technology, Management and Education, ICATME 2021
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2021 International Conference on Advances in Technology, Management and Education, ICATME 2021
Y2 - 8 January 2021 through 9 January 2021
ER -