TY - GEN
T1 - CSPR
T2 - 1st International Conference on Parallel, Distributed Computing Technologies and Applications, PDCTA 2011
AU - Neelima, B.
AU - Raghavendra, Prakash S.
PY - 2011
Y1 - 2011
N2 - General purpose computation on graphics processing unit (GPU) is prominent in the high performance computing era of this time. Porting or accelerating the data parallel applications onto GPU gives the default performance improvement because of the increased computational units. Better performances can be seen if application specific fine tuning is done with respect to the architecture under consideration. One such very widely used computation intensive kernel is sparse matrix vector multiplication (SPMV) in sparse matrix based applications. Most of the existing data format representations of sparse matrix are developed with respect to the central processing unit (CPU) or multi cores. This paper gives a new format for sparse matrix representation with respect to graphics processor architecture that can give 2x to 5x performance improvement compared to CSR (compressed row format), 2x to 54x performance improvement with respect to COO (coordinate format) and 3x to 10 x improvement compared to CSR vector format for the class of application that fit for the proposed new format. It also gives 10% to 133% improvements in memory transfer (of only access information of sparse matrix) between CPU and GPU. This paper gives the details of the new format and its requirement with complete experimentation details and results of comparison.
AB - General purpose computation on graphics processing unit (GPU) is prominent in the high performance computing era of this time. Porting or accelerating the data parallel applications onto GPU gives the default performance improvement because of the increased computational units. Better performances can be seen if application specific fine tuning is done with respect to the architecture under consideration. One such very widely used computation intensive kernel is sparse matrix vector multiplication (SPMV) in sparse matrix based applications. Most of the existing data format representations of sparse matrix are developed with respect to the central processing unit (CPU) or multi cores. This paper gives a new format for sparse matrix representation with respect to graphics processor architecture that can give 2x to 5x performance improvement compared to CSR (compressed row format), 2x to 54x performance improvement with respect to COO (coordinate format) and 3x to 10 x improvement compared to CSR vector format for the class of application that fit for the proposed new format. It also gives 10% to 133% improvements in memory transfer (of only access information of sparse matrix) between CPU and GPU. This paper gives the details of the new format and its requirement with complete experimentation details and results of comparison.
UR - https://www.scopus.com/pages/publications/80054806022
UR - https://www.scopus.com/pages/publications/80054806022#tab=citedBy
U2 - 10.1007/978-3-642-24037-9_58
DO - 10.1007/978-3-642-24037-9_58
M3 - Conference contribution
AN - SCOPUS:80054806022
SN - 9783642240362
T3 - Communications in Computer and Information Science
SP - 581
EP - 595
BT - Advances in Parallel, Distributed Computing - First International Conference on Parallel, Distributed Computing Technologies and Applications, PDCTA 2011, Proceedings
Y2 - 23 September 2011 through 25 September 2011
ER -