Abstract
Self-heating-induced thermal degradation is a severe issue in nonplanar MOS architectures. Especially in stacked gate-all-around (GAA) nanosheet FET (NSFET), the self-heating effect (SHE) is a prime concern as the channels are surrounded by low-thermal conductivity material (i.e., a stack of SiO2 and HfO2 layers). In this article, through well-calibrated TCAD models, we propose a buried oxide (BOX) engineered NSFET structure, which provides an appropriate heat flow path and mitigates the SHE-induced degradation. Unlike the conventional NSFET, where SiO2 is kept as a BOX layer, in the proposed NSFET, a crystalline-diamond-like carbon (DLC) is placed ubiquitously beneath the lower sheet, resulting in a reduction in the lattice temperature from the device active region (channel/sheet) toward the DLC substrate. Furthermore, the impact of device geometry, such as channel length (Lg), channel width (Tw), BOX thickness (TBOX), and the number of vertically stacked sheets (NS), on the thermal and electrical reliability of the proposed device has been investigated.
| Original language | English |
|---|---|
| Pages (from-to) | 1970-1976 |
| Number of pages | 7 |
| Journal | IEEE Transactions on Electron Devices |
| Volume | 70 |
| Issue number | 4 |
| DOIs | |
| Publication status | Published - 01-04-2023 |
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering
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