Design and Analysis of a GaSb Heterojuncton Vertical TFET with Source Pocket for Work Function Engineering and Improved Analog Performance

To provide a highly efficient device, this article presents a vertical GaSb tunnel field effect transistor (Hetero-VTFET) both with and without a source pocket in order to achieve the maximum level of performance. This is the first time that a group IV miscible alloy, GaSb, has been used in the source to improve carrier tunneling in a heterojunction of a source (GaSb) and channel (Si). Due to low band gap of GaSb material in source region the carrier tunnelling is high at source channel interface. A heterojunction structure and work function engineering are used to establish an optimal Hetero-Vertical TFET design. In order to analyze the behavior of hetero-Vertical TFETs developed, TCAD Silvaco simulation results are used. In accordance with the proposed optimal structure, the ratio of ION to I_OFF(>10¹⁴) is higher, the subthreshold swing is shorter (25 mV/Dec), and the ION current is in the range of 10^-5 A/m.