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Design and analysis of SHE-assisted STT MTJ/CMOS logic gates
Prashanth Barla
,
Vinod Kumar Joshi
*
,
Somashekara Bhat
*
Corresponding author for this work
School of Computer Engineering
Research output
:
Contribution to journal
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Article
›
peer-review
10
Citations (Scopus)
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INIS
design
100%
metals
100%
spin
100%
semiconductor materials
100%
oxides
100%
torque
100%
hall effect
100%
power
50%
devices
33%
comparative evaluations
33%
hybrids
33%
magnetic tunnel junctions
33%
performance
16%
interactions
16%
heavy metals
16%
dies
16%
atomic number
16%
Engineering
Complementary Metal-Oxide-Semiconductor
100%
Spin Transfer
100%
Logic Gate
100%
Magnetic Tunnel Junction
40%
Developed Device
20%
Schematic Diagram
20%
Heavy Metal
20%
Atomic Number
20%
Circuit Diagrams
20%
Material Science
Complementary Metal-Oxide-Semiconductor Device
100%
Heavy Metal
20%