TY - GEN
T1 - Design and simulation of a doubly clamped accelerometer with integrated silicon nanowires
AU - Vetrivel, S.
AU - Mathew, Ribu
AU - Sankar, A. Ravi
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2017/10/18
Y1 - 2017/10/18
N2 - Inertial MEMS piezoresistive acceleration sensors have found a wide range of applications in last four decades. This paper presents design and simulation of a doubly clamped acceleration sensor with integrated piezoresistors. Prime objective of this work is to enhance the electrical sensitivity of the sensor. In this regard, silicon nanowire (SiNW) based piezoresistors are deposited at the fixed end of the beams where maximum stress is experienced when the beam undergoes deformation. The complete device with integrated piezoresistors is virtually fabricated using a finite element method (FEM) based computer aided design (CAD) tool IntelliSuite®. For analysis, SiNW piezoresistors with two diiferent widths of 35 nm and 140 nm with a length and thickness of 2 μm and 40 nm respectively are considered. Results show that the device integrated with a 35 nm width piezoresistor depicts 1.36 times and 2.51 times more sensitivity than the devices with 140 nm width SiNW and bulk piezoresistors respectively.
AB - Inertial MEMS piezoresistive acceleration sensors have found a wide range of applications in last four decades. This paper presents design and simulation of a doubly clamped acceleration sensor with integrated piezoresistors. Prime objective of this work is to enhance the electrical sensitivity of the sensor. In this regard, silicon nanowire (SiNW) based piezoresistors are deposited at the fixed end of the beams where maximum stress is experienced when the beam undergoes deformation. The complete device with integrated piezoresistors is virtually fabricated using a finite element method (FEM) based computer aided design (CAD) tool IntelliSuite®. For analysis, SiNW piezoresistors with two diiferent widths of 35 nm and 140 nm with a length and thickness of 2 μm and 40 nm respectively are considered. Results show that the device integrated with a 35 nm width piezoresistor depicts 1.36 times and 2.51 times more sensitivity than the devices with 140 nm width SiNW and bulk piezoresistors respectively.
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U2 - 10.1109/ICEmElec.2016.8074583
DO - 10.1109/ICEmElec.2016.8074583
M3 - Conference contribution
AN - SCOPUS:85039921708
T3 - 2016 3rd International Conference on Emerging Electronics, ICEE 2016
BT - 2016 3rd International Conference on Emerging Electronics, ICEE 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 3rd International Conference on Emerging Electronics, ICEE 2016
Y2 - 27 December 2016 through 30 December 2016
ER -