Design of a Low-power Computational Unit using a Pipelined Vedic Multiplier

Engineering

• Computational Power 100%
• Central Processing Unit 100%
• Electric Power Utilization 50%
• Energy Dissipation 50%
• Adders 50%
• Graphics Processing Unit 50%
• Design Power 50%
• Electronic Design Automation 50%
• Application Specific Integrated Circuit 50%
• Digital Circuits 50%

INIS

• units 100%
• design 100%
• power 100%
• performance 33%
• processing 33%
• devices 11%
• reduction 11%
• comparative evaluations 11%
• tools 11%
• libraries 11%
• synthesis 11%
• architecture 11%
• automation 11%
• digital circuits 11%

Computer Science

• Computational Unit 100%
• Vedic Multiplier 100%
• Central Processing Unit 33%
• Power Consumption 16%
• Power Efficient 16%
• Application Specific Integrated Circuit 16%
• Design Strategy 16%
• Electronic Design Automation 16%
• Digital Circuit 16%
• Automation Tool 16%
• Technology Library 16%
• Subtractor 16%
• Low-Power Design 16%
• Graphics Processing Unit 16%
• Energy Dissipation 16%