Design of Low Power and High Speed 1-bit Full Adder for DSP Applications
- Shaik Mohisena Tabassum*
- , M. Venkata Kavya Sri
- , D. Bhanu Navya Sri
- , Shaik Muskaan
- , Satyajeet Sahoo
- , Aswini K. Samataray
*Corresponding author for this work
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
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