TY - JOUR
T1 - Development of Floating-Point MAC Engine for 2-D Convolution of Image
AU - Sahu, Ajay Kumar
AU - Kedlaya K., Vishnumurthy
AU - Nayak, Subramanya G.
N1 - Publisher Copyright:
© 2013 IEEE.
PY - 2021
Y1 - 2021
N2 - In the emerging trend of Graphics Processing Architecture, IEEE 754-2008 Floating point numbers are being widely used. Convolution is one of the standard operations in image processing applications, and because of its computationally intensive nature, an appropriate and efficient image processing architecture is of great need. This paper proposes a single-precision Floating Point MAC engine to accelerate the sliding window algorithm for the 2-D convolution of image. The engine uses a modified algorithm for virtual zero-padding that saves memory space, and it also provides configurable parameters to specify filter and image size. A low power multiplier with reduced dynamic power, specifically when operating on pixels and a faster increment by one circuit based on AND-EXOR gate structures, has been proposed to improve the MAC architecture. Finally, the paper shows the post-synthesis power dissipation, area estimate, and the quality comparison of the image obtained from the RTL Simulation of the proposed architecture.
AB - In the emerging trend of Graphics Processing Architecture, IEEE 754-2008 Floating point numbers are being widely used. Convolution is one of the standard operations in image processing applications, and because of its computationally intensive nature, an appropriate and efficient image processing architecture is of great need. This paper proposes a single-precision Floating Point MAC engine to accelerate the sliding window algorithm for the 2-D convolution of image. The engine uses a modified algorithm for virtual zero-padding that saves memory space, and it also provides configurable parameters to specify filter and image size. A low power multiplier with reduced dynamic power, specifically when operating on pixels and a faster increment by one circuit based on AND-EXOR gate structures, has been proposed to improve the MAC architecture. Finally, the paper shows the post-synthesis power dissipation, area estimate, and the quality comparison of the image obtained from the RTL Simulation of the proposed architecture.
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U2 - 10.1109/ACCESS.2021.3117335
DO - 10.1109/ACCESS.2021.3117335
M3 - Article
AN - SCOPUS:85117592074
SN - 2169-3536
VL - 9
SP - 138849
EP - 138857
JO - IEEE Access
JF - IEEE Access
ER -