Digital-logic assessment of junctionless twin gate trench channel (JL-TGTC) MOSFET for memory circuit applications
- Ajay Kumar*
- , Neha Gupta
- , Aditya Jain
- , Rajeev Gupta
- , Bharat Choudhary
- , Kaushal Kumar
- , Amit Kumar Goyal
- , Yehia Massoud
*Corresponding author for this work
Research output: Contribution to journal › Article › peer-review
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