Diminish Short Channel Effects on Cylindrical GAA Hetero-gate Dielectric TFET using High-Density Delta

The examined work elucidates a novel concept on Gate All Around (GAA) hetero dielectric gate-cylindrical tunnel field-effect transistor (TFET) to reduce SCEs. In this paper, a hetero dielectric gate (HeG) integrated with Silicon-Germanium (Si-Ge) substrate material is proposed along with a novel placement of a high-density delta (HDD) layer across the source–channel junction to achieve high I_ON of 1.12 × 10⁻⁴ A/µm and robust I_OFF of 9.7 × 10⁻¹⁷ A/µm at V_gs = 1.2 V with steepest subthreshold swing (SS) of 55 mV/decade. Designing and computation of the proffered structure have been done with the computer-aided design (TCAD) 3D device computation software. The systematic investigation in terms of AC and DC parameters, such as ON-current, OFF-current, Miller Capacitances (Gate-Drain Capacitance (C_gd)) and Gate-Source Capacitance (C_gs), are examined. Hetero-gate dielectric Cyl-TFET with high-density delta (HDD) is superior to other conventional structures. The result outcomes included a trap analysis while incorporating the hot charge carriers inside the oxide for improved device reliability. Furthermore, a low C_gd of 58fF and high C_gs of 6.6fF at V_ds= 0.3 V have been achieved.