DRV Evaluation of 6T SRAM Cell Using 45nm Technology

Vinod Kumar Joshi; Chetana Chetana

doi:10.1109/IESPC.2019.8902426

DRV Evaluation of 6T SRAM Cell Using 45nm Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

We have evaluated Data Retention Voltage (DRV), an important characteristic of 6T SRAM cell in hold mode, for various process corners (PCs) by varying temperature (T). We noticed significant variation in the DRV value of 6T SRAM cell in hold mode for various PCs, Typical-Typical (TT), Slow-Slow (SS), Slow-Fast (SF), Fast-Slow (FS), Fast-Fast (FF) and Monte-Carlo (MC) at T= 15⁰C, 25⁰C, 50⁰C, 75⁰C and 100⁰C. The highest DRV value obtained for FS process corner is 113.5 mV at 25⁰C, 111 mV at 50⁰C, 108.5 mV at 75⁰C and 107 mV at 100⁰C respectively. These values are considered as the worst case DRV. While for SS process corner the worst case DRV is reported as 120 mV at 15⁰C temperature.

Original language	English
Title of host publication	Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	207-210
Number of pages	4
ISBN (Electronic)	9781728107448
DOIs	https://doi.org/10.1109/IESPC.2019.8902426
Publication status	Published - 03-2019
Event	2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019 - Shillong, India Duration: 01-03-2019 → 02-03-2019

Publication series

Name	Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019

Conference

Conference	2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019
Country/Territory	India
City	Shillong
Period	01-03-19 → 02-03-19

All Science Journal Classification (ASJC) codes

Computer Networks and Communications
Hardware and Architecture
Signal Processing
Electrical and Electronic Engineering
Instrumentation

Access to Document

10.1109/IESPC.2019.8902426

Cite this

Joshi, V. K., & Chetana, C. (2019). DRV Evaluation of 6T SRAM Cell Using 45nm Technology. In Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019 (pp. 207-210). Article 8902426 (Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/IESPC.2019.8902426

Joshi, Vinod Kumar ; Chetana, Chetana. / DRV Evaluation of 6T SRAM Cell Using 45nm Technology. Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019. Institute of Electrical and Electronics Engineers Inc., 2019. pp. 207-210 (Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019).

@inproceedings{22e8bb74e7fe455a9d998233115b97e5,

title = "DRV Evaluation of 6T SRAM Cell Using 45nm Technology",

abstract = "We have evaluated Data Retention Voltage (DRV), an important characteristic of 6T SRAM cell in hold mode, for various process corners (PCs) by varying temperature (T). We noticed significant variation in the DRV value of 6T SRAM cell in hold mode for various PCs, Typical-Typical (TT), Slow-Slow (SS), Slow-Fast (SF), Fast-Slow (FS), Fast-Fast (FF) and Monte-Carlo (MC) at T= 150C, 250C, 500C, 750C and 1000C. The highest DRV value obtained for FS process corner is 113.5 mV at 250C, 111 mV at 500C, 108.5 mV at 750C and 107 mV at 1000C respectively. These values are considered as the worst case DRV. While for SS process corner the worst case DRV is reported as 120 mV at 150C temperature.",

author = "Joshi, {Vinod Kumar} and Chetana Chetana",

year = "2019",

month = mar,

doi = "10.1109/IESPC.2019.8902426",

language = "English",

series = "Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "207--210",

booktitle = "Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019",

address = "United States",

note = "2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019 ; Conference date: 01-03-2019 Through 02-03-2019",

}

Joshi, VK & Chetana, C 2019, DRV Evaluation of 6T SRAM Cell Using 45nm Technology. in Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019., 8902426, Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019, Institute of Electrical and Electronics Engineers Inc., pp. 207-210, 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019, Shillong, India, 01-03-19. https://doi.org/10.1109/IESPC.2019.8902426

DRV Evaluation of 6T SRAM Cell Using 45nm Technology. / Joshi, Vinod Kumar; Chetana, Chetana.
Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019. Institute of Electrical and Electronics Engineers Inc., 2019. p. 207-210 8902426 (Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

T1 - DRV Evaluation of 6T SRAM Cell Using 45nm Technology

AU - Joshi, Vinod Kumar

AU - Chetana, Chetana

PY - 2019/3

Y1 - 2019/3

N2 - We have evaluated Data Retention Voltage (DRV), an important characteristic of 6T SRAM cell in hold mode, for various process corners (PCs) by varying temperature (T). We noticed significant variation in the DRV value of 6T SRAM cell in hold mode for various PCs, Typical-Typical (TT), Slow-Slow (SS), Slow-Fast (SF), Fast-Slow (FS), Fast-Fast (FF) and Monte-Carlo (MC) at T= 150C, 250C, 500C, 750C and 1000C. The highest DRV value obtained for FS process corner is 113.5 mV at 250C, 111 mV at 500C, 108.5 mV at 750C and 107 mV at 1000C respectively. These values are considered as the worst case DRV. While for SS process corner the worst case DRV is reported as 120 mV at 150C temperature.

AB - We have evaluated Data Retention Voltage (DRV), an important characteristic of 6T SRAM cell in hold mode, for various process corners (PCs) by varying temperature (T). We noticed significant variation in the DRV value of 6T SRAM cell in hold mode for various PCs, Typical-Typical (TT), Slow-Slow (SS), Slow-Fast (SF), Fast-Slow (FS), Fast-Fast (FF) and Monte-Carlo (MC) at T= 150C, 250C, 500C, 750C and 1000C. The highest DRV value obtained for FS process corner is 113.5 mV at 250C, 111 mV at 500C, 108.5 mV at 750C and 107 mV at 1000C respectively. These values are considered as the worst case DRV. While for SS process corner the worst case DRV is reported as 120 mV at 150C temperature.

UR - http://www.scopus.com/inward/record.url?scp=85075886882&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85075886882&partnerID=8YFLogxK

U2 - 10.1109/IESPC.2019.8902426

DO - 10.1109/IESPC.2019.8902426

M3 - Conference contribution

T3 - Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019

SP - 207

EP - 210

BT - Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019

Y2 - 1 March 2019 through 2 March 2019

ER -

Joshi VK, Chetana C. DRV Evaluation of 6T SRAM Cell Using 45nm Technology. In Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019. Institute of Electrical and Electronics Engineers Inc. 2019. p. 207-210. 8902426. (Proceedings of 2nd International Conference on Innovations in Electronics, Signal Processing and Communication, IESC 2019). doi: 10.1109/IESPC.2019.8902426

DRV Evaluation of 6T SRAM Cell Using 45nm Technology

Abstract

Publication series

Conference

All Science Journal Classification (ASJC) codes

Access to Document

Other files and links

Fingerprint

Cite this