Efficient Algorithm Analysis Of Kidney Images On FPGA

The field-programmable gate array (FPGA) offers an effective solution to meet the high-performance requirements of real-time digital signal processors. IP cores developed on FPGAs benefit from the programmable logic's flexibility, efficient timing, and adaptability in algorithm modification, coupled with the processing power provided by the embedded processor. Integrating image processing into this sector is an ideal addition, especially in the growing field of edge detection, which is crucial in areas like image pattern recognition, machine learning, and data processing. This paper presents a case study focused on kidney CT scan images for edge detection, utilizing the Sobel and Canny edge detection techniques on the target FPGA device, xc7z020clg484-1. An IP core was designed and generated using VIVADO software, converting image pixels into binary form for pre-processing through these edge detection algorithms. The algorithms were simulated and synthesized on the xc7z020clg484-1 FPGA, with the entire design implemented in Verilog code to create the IP, which connects to the DMA controller throughout the system. This IP core can process multiple CT scan images simultaneously, making it valuable for various biomedical applications. The primary aim of this research is to compare the Sobel and Canny edge detection algorithms to identify the best approach for developing an IP core, evaluated by metrics such as total power consumption, CPU time, execution time, LUT count, and FF usage. The resulting IP core is efficient and conserves resources, making it suitable for other embedded applications.