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Enhancing Voltage Amplification in FE-DE Heterostructure with Multiple Dielectrics

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Abstract

    This paper presents how the application of different dielectrics affects the ferroelectric-dielectric (FE-DE) heterostructure's properties, including voltage amplification, capacitance increase, and negative capacitance stability. The initial study examines an isolated ferroelectric capacitor and found an S-shaped voltage-charge relationship. In ferroelectrics, negative capacitance is indicated by the negative slope in charge against voltage characteristics, instability is observed. An additional dielectric capacitor is added in series to stabilize negative capacitance. In a non-leaky heterostructure using Silicon dioxide (SiO2), Silicon nitride (Si3N4), Aluminum oxide (Al2O3), and Hafnium silicate (HfSiO4) as dielectrics and Lanthanum (La) as the ferroelectric material, when the capacitance of dielectric material is less than the negative of the inverse anisotropy constant, stability is achieved. The charge against voltage characteristics does not exhibit any negative slope regions which ensures positive capacitance in the heterostructure. Ferroelectric and dielectric capacitors are used in series to lower the total energy and stabilize the state of negative capacitance. Voltage amplification results from this, confirming the heterostructure's effectiveness in enhancing voltage with small modifications to the supply. Greater capacitance values of the dielectric can result in stronger voltage amplification.

    Original languageEnglish
    Title of host publication8th IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics, DISCOVER 2024 - Proceedings
    PublisherInstitute of Electrical and Electronics Engineers Inc.
    Pages164-170
    Number of pages7
    ISBN (Electronic)9798350350593
    DOIs
    Publication statusPublished - 2024
    Event8th IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics, DISCOVER 2024 - Mangalore, India
    Duration: 18-10-202419-10-2024

    Publication series

    Name8th IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics, DISCOVER 2024 - Proceedings

    Conference

    Conference8th IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics, DISCOVER 2024
    Country/TerritoryIndia
    CityMangalore
    Period18-10-2419-10-24

    All Science Journal Classification (ASJC) codes

    • Artificial Intelligence
    • Computer Networks and Communications
    • Hardware and Architecture
    • Electrical and Electronic Engineering

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