This paper presents a switched-capacitor topology with fewer switching components and reduced voltage stresses. The circuit contains eight switches and two capacitors to generate a five-level voltage waveform. This paper provides in-depth descriptions of the structural design, operation, and loss analysis. Inherently self-balanced capacitors are utilized in the proposed topology, which eliminates the need for additional charge balancing circuits and sensors. The control action was implemented using a simple logic-based multicarrier pulse width modulation (PWM) strategy. A brief comparative analysis with state-of-the-art topologies has been presented to demonstrate the merits of the developed topology. Finally, the feasibility and efficacy of the suggested topology have been evaluated using simulation and experimental testing to ensure that it is both feasible and effective.
All Science Journal Classification (ASJC) codes
- Control and Systems Engineering
- Electrical and Electronic Engineering