@inproceedings{538e3193f5f442b291afca60b2909822,
title = "High-speed hybrid tree multiplier hardware using modified Wallace and Dadda method",
abstract = "In this paper, we proposed an 8x8 Hybrid multiplier design using Dadda and Modified Wallace methods. To achieve high-speed multiplication, two different algorithms are used parallelly in partial product reduction stage. These algorithms achieved by splitting of partial products into four groups. Ripple carry adder is used in the final stage to receive the end products. This design is implemented, simulated, evaluated using Xilinx ISE tool. The target device used is Xilinx Spartan3E XC3S500E with package FG320.",
author = "Rashmi Samanth and Pooja S. and Nayak, \{Subramanya G.\}",
note = "Publisher Copyright: {\textcopyright} 2021 Author(s).; 2nd International Conference on Manufacturing, Material Science and Engineering 2020, ICMMSE 2020 ; Conference date: 18-12-2020 Through 19-12-2020",
year = "2021",
month = jul,
day = "30",
doi = "10.1063/5.0057908",
language = "English",
series = "AIP Conference Proceedings",
publisher = "American Institute of Physics Inc.",
editor = "Babu, \{B. Sridhar\} and Kaushik Kumar and Kumar, \{S. Sateesh\} and Prasad, \{B. Anjaneya\}",
booktitle = "2nd International Conference on Manufacturing, Material Science and Engineering 2020, ICMMSE 2020",
}