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Insight into Threshold Voltage and Drain Induced Barrier Lowering in Negative Capacitance Field Effect Transistor

  • Bhaskar Awadhiya*
  • , Pravin N. Kondekar
  • , Sameer Yadav
  • , Pranshoo Upadhyay
  • *Corresponding author for this work

    Research output: Contribution to journalArticlepeer-review

    Abstract

    In this paper, we have discussed threshold voltage and drain induced barrier lowering in NCFET. Threshold voltage in NCFET is lower as compared to MOSFET which is mainly because of negative equivalent oxide capacitance in NCFET. Further, we have discussed drain induced barrier lowering in NCFET and MOSFET. An increase in drain bias in MOSFET leads to decrease in threshold voltage and an increase in leakage current whereas in NCFET increase in drain bias leads to increase in threshold voltage and decrease in leakage current. We have obtained a positive value of DIBL factor for MOSFET and negative value for NCFET.

    Original languageEnglish
    Pages (from-to)267-273
    Number of pages7
    JournalTransactions on Electrical and Electronic Materials
    Volume22
    Issue number3
    DOIs
    Publication statusPublished - 06-2021

    All Science Journal Classification (ASJC) codes

    • Electronic, Optical and Magnetic Materials
    • Electrical and Electronic Engineering

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