Intrinsic evolvable hardware chip design for a nonlinear process control plant

In this paper, a new multiple sensor coordinator based sensor validation scheme combining the techniques of evolvable hardware and neural networks, is presented. The idea of this work is to develop a system that is resistant or tolerant to sensor failures (fault tolerance) by utilizing multiple sensor inputs connected to a programmable VLSI chip. The proposed system can be viewed as process modeling formalism and given the appropriate network topology; is capable of characterizing non-linear functional relationships. The structure of the resulting evolvable hardware based process model can be considered generic, in the sense that little prior process knowledge is required. The knowledge about the plant dynamics and mapping characteristics are implicitly stored within the network. The proposed system help in extending the range of operation of the conventional control systems with respect to sensor validation at no extra (hardware) costs. The proposed design algorithms focus on using the characteristics that evolved systems present like, for example adaptation, auto-regulation and learning. The main idea, therefore, is to monitor and approximate any off-nominal behaviour in the dynamical system by using on-line approximation structures. A non-linear process control plant utilizing multiple sensors to measure the various states and environmental conditions is used for real-time implementation and study. The proposed system was tested for its effectiveness by introducing different sensor failures such as: sensor fails as open circuit, sensor fails as short circuit, multiple sensor failure, etc. and in each case the performance index was computed. Since, evolvable algorithms does not depend solely on mathematical analysis and manipulation, it is a more attractive choice to deal with complex system problems.