Low power and high speed level shifters in 0.18um technology

Om Prakash Kumar; D. Jackuline Moni; Flavia Princess

doi:10.1109/ICDCSyst.2014.6926214

Low power and high speed level shifters in 0.18um technology

Om Prakash Kumar, D. Jackuline Moni, Flavia Princess

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

As the demand of handheld devices like personal computers, cell phones, multimedia devices etc., is growing, low power consumption has become major design issue for microelectronics circuits. In multi voltage systems, level shifters are significant circuit components and are used in between core circuit and I/O circuit. In this paper high level shifters for low power and high speed application have been presented. Level shifter II has power consumption of 180.75pw and delay of 435.66 us as compared to 231.56 pw and 49.57 ms of level shifter I. Level shifter IV has power consumption of 70.29 pw and delay of 282.87 ps as compared to 77.18 pw and 299.26 ps of level shifter III. All the circuits were simulated using Mentor Graphics Design Architect 0.18um Technology.

Original language	English
Title of host publication	Proceedings of the IEEE International Caracas Conference on Devices, Circuits and Systems, ICCDCS
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781479913565
DOIs	https://doi.org/10.1109/ICDCSyst.2014.6926214
Publication status	Published - 15-10-2014
Event	2014 2nd International Conference on Devices, Circuits and Systems, ICDCS 2014 - Combiatore, India Duration: 06-03-2014 → 08-03-2014

Conference

Conference	2014 2nd International Conference on Devices, Circuits and Systems, ICDCS 2014
Country/Territory	India
City	Combiatore
Period	06-03-14 → 08-03-14

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Access to Document

10.1109/ICDCSyst.2014.6926214

Cite this

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title = "Low power and high speed level shifters in 0.18um technology",

abstract = "As the demand of handheld devices like personal computers, cell phones, multimedia devices etc., is growing, low power consumption has become major design issue for microelectronics circuits. In multi voltage systems, level shifters are significant circuit components and are used in between core circuit and I/O circuit. In this paper high level shifters for low power and high speed application have been presented. Level shifter II has power consumption of 180.75pw and delay of 435.66 us as compared to 231.56 pw and 49.57 ms of level shifter I. Level shifter IV has power consumption of 70.29 pw and delay of 282.87 ps as compared to 77.18 pw and 299.26 ps of level shifter III. All the circuits were simulated using Mentor Graphics Design Architect 0.18um Technology.",

author = "Kumar, {Om Prakash} and Moni, {D. Jackuline} and Flavia Princess",

year = "2014",

month = oct,

day = "15",

doi = "10.1109/ICDCSyst.2014.6926214",

language = "English",

booktitle = "Proceedings of the IEEE International Caracas Conference on Devices, Circuits and Systems, ICCDCS",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

address = "United States",

note = "2014 2nd International Conference on Devices, Circuits and Systems, ICDCS 2014 ; Conference date: 06-03-2014 Through 08-03-2014",

}

Kumar, OP, Moni, DJ & Princess, F 2014, Low power and high speed level shifters in 0.18um technology. in Proceedings of the IEEE International Caracas Conference on Devices, Circuits and Systems, ICCDCS., 6926214, Institute of Electrical and Electronics Engineers Inc., 2014 2nd International Conference on Devices, Circuits and Systems, ICDCS 2014, Combiatore, India, 06-03-14. https://doi.org/10.1109/ICDCSyst.2014.6926214

Low power and high speed level shifters in 0.18um technology. / Kumar, Om Prakash; Moni, D. Jackuline; Princess, Flavia.
Proceedings of the IEEE International Caracas Conference on Devices, Circuits and Systems, ICCDCS. Institute of Electrical and Electronics Engineers Inc., 2014. 6926214.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AU - Kumar, Om Prakash

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AU - Princess, Flavia

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N2 - As the demand of handheld devices like personal computers, cell phones, multimedia devices etc., is growing, low power consumption has become major design issue for microelectronics circuits. In multi voltage systems, level shifters are significant circuit components and are used in between core circuit and I/O circuit. In this paper high level shifters for low power and high speed application have been presented. Level shifter II has power consumption of 180.75pw and delay of 435.66 us as compared to 231.56 pw and 49.57 ms of level shifter I. Level shifter IV has power consumption of 70.29 pw and delay of 282.87 ps as compared to 77.18 pw and 299.26 ps of level shifter III. All the circuits were simulated using Mentor Graphics Design Architect 0.18um Technology.

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ER -

Low power and high speed level shifters in 0.18um technology

Abstract

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All Science Journal Classification (ASJC) codes

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