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Memristor based Adders for High Performance applications

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Abstract

    The memristor is an emerging nanodevice that has recently attracted significant attention from researchers. It combines resistive and memory properties, offering vast potential in nanoelectronics and memory design. A key feature of memristors is their ability to change resistance under voltage control and retain this resistance even after the voltage is removed. Additionally, their small size enables the creation of ultra-compact memory systems. Recognized as the fourth passive circuit element, the memristor offers several advantages, including variable resistance, flexibility, zero leakage current, and compatibility with CMOS technology. In this paper, adder circuits (Half Adder and Full Adder) using both memristors and CMOS within the MRL (Memristor Ratioed Logic) family, utilizing the VTEAM (Voltage Threshold Adaptive Memristor) model has been designed focusing on performance. These circuits are applicable to various logic computing architectures. CMOS transistors are implemented using GPDK 180 nm technology, and parameters such as delay, and power consumption are analyzed. The results show that Memristor based adders can dramatically increase the performance of existing arithmetic circuits empowering the high performance computing arena.

    Original languageEnglish
    Title of host publication2024 3rd International Conference on Artificial Intelligence, Computational Electronics and Communication System, AICECS 2024
    PublisherInstitute of Electrical and Electronics Engineers Inc.
    ISBN (Electronic)9798350391244
    DOIs
    Publication statusPublished - 2024
    Event3rd International Conference on Artificial Intelligence, Computational Electronics and Communication System, AICECS 2024 - Manipal, India
    Duration: 12-12-202414-12-2024

    Publication series

    Name2024 3rd International Conference on Artificial Intelligence, Computational Electronics and Communication System, AICECS 2024

    Conference

    Conference3rd International Conference on Artificial Intelligence, Computational Electronics and Communication System, AICECS 2024
    Country/TerritoryIndia
    CityManipal
    Period12-12-2414-12-24

    All Science Journal Classification (ASJC) codes

    • Artificial Intelligence
    • Computer Networks and Communications
    • Computer Science Applications
    • Computer Vision and Pattern Recognition
    • Computational Mathematics
    • Instrumentation
    • Electrical and Electronic Engineering

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