Negative capacitance based phase-transition FET for low power applications: Device-circuit co-design

Sameer Yadav, P. N. Kondekar, Pranshoo Upadhyay, Bhaskar Awadhiya

Research output: Contribution to journalArticlepeer-review

5 Citations (Scopus)


In this article, we have performed a comprehensive study into the Phase Transition Material based FinFET(PT-FinFET) device's capabilities for low-power, energy-efficient applications through device circuit co-design perspective. Addressing its drawback at device and circuit level a novel device design known as the Negative Capacitance Phase Transition FinFET(NC-PTFinFET) is proposed by incorporating a ferroelectric material layer into the gate stack of the PTFinFET. The proposed device outperforms PTFinFET and FinFET in terms of SS and ON–OFF current ratio at the device level, as well as power and speed at the circuit level, and provides device tunability. With three case studies of embedded inverter chain, RO, and 2-bit RCA it was observed that the proposed NC-PTFinFET shows performance benefits in speed by reducing delay in these circuits with increasing NC thickness in comparison with the PTFinFET and FinFET. In contrast, increasing NC thickness in the proposed device energy efficiency is improved as compared to PTFinFET and FinFET.

Original languageEnglish
Article number105411
JournalMicroelectronics Journal
Publication statusPublished - 05-2022

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Atomic and Molecular Physics, and Optics
  • Condensed Matter Physics
  • Surfaces, Coatings and Films
  • Electrical and Electronic Engineering


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