Performance Analysis of 64×64 bit Multiplier Designed Using Urdhva Tiryakbyham and Nikhilam Navatashcaramam Dashatah Sutras

G. S. Sai Venkatramana Prasada, G. Seshikala, Niranjana Sampathila

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Citations (Scopus)

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