Performance Prediction and Optimization of Network-on-Chip Architectures Using Machine Learning

The rapid growth of Network-on-Chip (NoC) architectures necessitates innovative approaches to optimize performance, efficiency, and scalability in multi-core systems. This paper presents a systematic framework for NoC optimization by comparing machine learning algorithms, including Support Vector Regression (SVR), Linear Regression, Gradient Boosting, Random Forest, Decision Trees, CNN, TPOT (AutoML), and XGBoost, to identify the most effective algorithm for dynamic, scalable NoCs. A comprehensive dataset was generated using the Noxim simulator, employing diverse configurations across topologies, routing strategies, packet injection rates, buffer sizes, network sizes, traffic patterns, and virtual channels. Simulations captured key metrics like latency, throughput, and energy, iteratively constructing a robust dataset covering varied NoC scenarios. Through detailed evaluation using standard metrics like Mean Squared Error (MSE), Mean Absolute Error (MAE), and R² Score, this work identifies Random Forest and TPOT as optimal for scalable NoC designs, enhancing performance and energy efficiency in computational systems.