TY - GEN
T1 - RNS-To-Binary converters for New Three-moduli sets {2k, 2k-1, 2k(2k-1)+ 1} and {2k, 2k-1, 2k(2k-1)-1}
AU - Phalguna, P. S.
AU - Kamat, Dattaguru V.
AU - Mohan, P. V.Ananda
PY - 2019/11
Y1 - 2019/11
N2 - In this paper, Residue Number System (RNS)-to-binary converters for two new three-moduli sets {2k, 2k-1, 2k (2k_ 1)+l} and {2k, 2k-1, 2k(2k-1)-1} using Mixed Radix Conversion (MRC) technique are proposed. The architectures of the reverse converters are designed so as to facilitate implicit sign detection. The proposed designs are compared regarding hardware resources and computation time with three moduli reverse converters, sign detectors and reverse converters with sign detectors for the dynamic ranges of about 4k bits described in literature. The ASIC implementation results for the proposed designs are also provided using 180 nm technology.
AB - In this paper, Residue Number System (RNS)-to-binary converters for two new three-moduli sets {2k, 2k-1, 2k (2k_ 1)+l} and {2k, 2k-1, 2k(2k-1)-1} using Mixed Radix Conversion (MRC) technique are proposed. The architectures of the reverse converters are designed so as to facilitate implicit sign detection. The proposed designs are compared regarding hardware resources and computation time with three moduli reverse converters, sign detectors and reverse converters with sign detectors for the dynamic ranges of about 4k bits described in literature. The ASIC implementation results for the proposed designs are also provided using 180 nm technology.
UR - http://www.scopus.com/inward/record.url?scp=85078536928&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85078536928&partnerID=8YFLogxK
U2 - 10.1109/PrimeAsia47521.2019.8950699
DO - 10.1109/PrimeAsia47521.2019.8950699
M3 - Conference contribution
AN - SCOPUS:85078536928
T3 - Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics
SP - 33
EP - 36
BT - Proceedings - PrimeAsia 2019
PB - IEEE Computer Society
T2 - 2019 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, PrimeAsia 2019
Y2 - 11 November 2019 through 14 November 2019
ER -