SO-OTA Based Emulator Circuit for Extended Memristor with Hysteresis Loop of Type II

V. Raghavendra, D. V. Kamath

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

This paper presents an emulator circuit using single-output operational transconductance amplifier (SO-OTA) for an extended memristor which provides a hysteretic loop of type II. The type I 'pinched hysteresis' curve of the memristor usually traces in the I and III quadrant of I- V plane in anticlockwise-clockwise or clockwise-anticlockwise direction. The hysteresis curve of proposed extended memristor emulator circuit traces in the anticlockwise-anticlockwise direction in first and third quadrants of I-V plane. The Cadence simulation results are provided for design verification.

Original languageEnglish
Title of host publicationProceedings of the International Conference on Electronics and Sustainable Communication Systems, ICESC 2020
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages984-988
Number of pages5
ISBN (Electronic)9781728141084
DOIs
Publication statusPublished - 07-2020
Event2020 International Conference on Electronics and Sustainable Communication Systems, ICESC 2020 - Coimbatore, India
Duration: 02-07-202004-07-2020

Publication series

NameProceedings of the International Conference on Electronics and Sustainable Communication Systems, ICESC 2020

Conference

Conference2020 International Conference on Electronics and Sustainable Communication Systems, ICESC 2020
Country/TerritoryIndia
CityCoimbatore
Period02-07-2004-07-20

All Science Journal Classification (ASJC) codes

  • Artificial Intelligence
  • Computer Networks and Communications
  • Information Systems and Management
  • Renewable Energy, Sustainability and the Environment
  • Safety, Risk, Reliability and Quality
  • Instrumentation
  • Communication

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