TY - GEN
T1 - Study on effect of thermo-structural loading on the PCB during Selective Soldering process using finite element method
AU - Bhat, Subraya Krishna
AU - Deshpande, Raghavendra
AU - Beck, Peter
AU - Hegde, Sudarshan
AU - Upadhyaya, Y. S.
AU - Ghosh, Chandan Kumar
N1 - Publisher Copyright:
© 2016 The Japan Institute of Electronics Packaging.
PY - 2016/6/7
Y1 - 2016/6/7
N2 - Electronic components are soldered on to a Printed Circuit Board (PCB) to form an electronic assembly. Earlier all solders contained Lead (Pb), but environmental concerns with Pb have paved the way for development of lead-free solders to replace the commercial Tin-Lead (Sn-Pb) solders in electronic packaging systems. Majority of lead-free solders available exhibit poorer properties and higher surface tension than traditional Sn-Pb alloys. Therefore lead-free solders require processing at higher temperatures. In mixed assembly technology, both Surface Mount Technology (SMT) and Through Hole Technology (THT) components are placed on the PCB. During production, SMT components are soldered initially followed by Selective Soldering process to solder the THT components. The need for higher processing temperatures result in higher thermal load on the board, resulting in complications of unwarranted warpage of PCB during soldering. The alarming levels of deflection and bending in PCB in turn endanger the already mounted temperature sensitive SMT components. This bending also results in formation of defective solder joints. Consequently this process requires perfect precision. This paper presents, a Thermo-Mechanical FE analysis results to elaborate the effects of various parameters on the PCB strains during the process. Also discussions on fixture strategy to minimize PCB strain are explained. The fixture suggested based on the FE analysis can be implemented during production, resulting in a foolproof process. To ensure reliable solder joints and safety of the electronic components, PCB strains are restricted within certain limits considering safety criteria of critical electronic components. The FE package ANSYS 15.0 has been used for numerical simulations. Preliminary results from the FE model suggest that it is matching with the observations of warpage in the production samples. Detailed experimental validation has been planned in the near future.
AB - Electronic components are soldered on to a Printed Circuit Board (PCB) to form an electronic assembly. Earlier all solders contained Lead (Pb), but environmental concerns with Pb have paved the way for development of lead-free solders to replace the commercial Tin-Lead (Sn-Pb) solders in electronic packaging systems. Majority of lead-free solders available exhibit poorer properties and higher surface tension than traditional Sn-Pb alloys. Therefore lead-free solders require processing at higher temperatures. In mixed assembly technology, both Surface Mount Technology (SMT) and Through Hole Technology (THT) components are placed on the PCB. During production, SMT components are soldered initially followed by Selective Soldering process to solder the THT components. The need for higher processing temperatures result in higher thermal load on the board, resulting in complications of unwarranted warpage of PCB during soldering. The alarming levels of deflection and bending in PCB in turn endanger the already mounted temperature sensitive SMT components. This bending also results in formation of defective solder joints. Consequently this process requires perfect precision. This paper presents, a Thermo-Mechanical FE analysis results to elaborate the effects of various parameters on the PCB strains during the process. Also discussions on fixture strategy to minimize PCB strain are explained. The fixture suggested based on the FE analysis can be implemented during production, resulting in a foolproof process. To ensure reliable solder joints and safety of the electronic components, PCB strains are restricted within certain limits considering safety criteria of critical electronic components. The FE package ANSYS 15.0 has been used for numerical simulations. Preliminary results from the FE model suggest that it is matching with the observations of warpage in the production samples. Detailed experimental validation has been planned in the near future.
UR - https://www.scopus.com/pages/publications/84978199996
UR - https://www.scopus.com/inward/citedby.url?scp=84978199996&partnerID=8YFLogxK
U2 - 10.1109/ICEP.2016.7486886
DO - 10.1109/ICEP.2016.7486886
M3 - Conference contribution
AN - SCOPUS:84978199996
T3 - 2016 International Conference on Electronics Packaging, ICEP 2016
SP - 542
EP - 547
BT - 2016 International Conference on Electronics Packaging, ICEP 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2016 International Conference on Electronics Packaging, ICEP 2016
Y2 - 20 April 2016 through 22 April 2016
ER -