VLSI design techniques for low power MAC unit: A review

Ajay Kumar Sahu, Rashmi Samanth, Tanya Mendez, Subramanya G. Nayak, K. Vishnumurthy Kedlaya

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

MAC Unit is the basic building block of any signal processing hardware. At present, every field, such as medicine, astronomy, geography, industry, embedded system, etc requires applications of digital image processing. These fields require real-time processing, and efficiency is necessary in the implementation of digital image processing. Multiplier -and Accumulator (MAC) Units perform the mathematical operation such as convolution. They are the fundamental digital block and are the most computationally and resource-demanding unit. A MAC unit with optimum performance and power consumption is always desired. The primary contribution of this paper is investigating the existing work and techniques used by several authors to minimize the power consumption in the design of MAC Unit. This review can provide aninsight to the beginners in the VLSI Arithmetic Circuit Design to gain more idea on Low power MAC Unit Design.

Original languageEnglish
Title of host publication2nd International Conference on Manufacturing, Material Science and Engineering 2020, ICMMSE 2020
EditorsB. Sridhar Babu, Kaushik Kumar, S. Sateesh Kumar, B. Anjaneya Prasad
PublisherAmerican Institute of Physics Inc.
ISBN (Electronic)9780735441149
DOIs
Publication statusPublished - 30-07-2021
Event2nd International Conference on Manufacturing, Material Science and Engineering 2020, ICMMSE 2020 - Hyderabad, India
Duration: 18-12-202019-12-2020

Publication series

NameAIP Conference Proceedings
Volume2358
ISSN (Print)0094-243X
ISSN (Electronic)1551-7616

Conference

Conference2nd International Conference on Manufacturing, Material Science and Engineering 2020, ICMMSE 2020
Country/TerritoryIndia
CityHyderabad
Period18-12-2019-12-20

All Science Journal Classification (ASJC) codes

  • Physics and Astronomy(all)

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